Design for Manufacturability and Reliability in Extreme Scaling and Beyond

ECE Seminar: Design for Manufacturability and Reliability in Extreme Scaling and Beyond

Starts at: February 5, 2015 4:30 PM

Ends at: 6:00 PM

Location: Scaife 125

Speaker: David Z. Pan

Affiliation: University of Texas at Austin

Refreshments provided: Yes

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As the nanometer IC critical dimension enters the era of extreme scaling (14nm, 11nm and beyond), manufacturability challenges are exacerbated, due to multiple patterning and other emerging lithography technologies. Meanwhile, the vertical scaling with 3D-IC integration using through-silicon-vias (TSVs) has gained tremendous interest and initial industry adoption, but TSV involves disruptive manufacturing technologies that require new modeling and design techniques for reliable 3D IC integration. Furthermore, new devices/materials such as nanophotonics are making their headways to on-chip VLSI integration for energy efficiency. All these require new design and process technology co-optimizations. This talk will present some key challenges and recent results in design for manufacturability and reliability in extreme scaling and beyond, enabled by emerging lithography, 3D-IC and optical interconnects. Cross-layer modeling and CAD tool/methodologies will be discussed to achieve future heterogeneous and reliable circuits and system integration.

David Z. Pan received his BS degree from Peking University, and MS/PhD degrees from UCLA. He was a Research Staff Member at IBM T. J. Watson Research Center from 2000 to 2003. He is currently the Engineering Foundation Professor at the Department of Electrical and Computer Engineering, UT Austin.