Manish Pandey

Adjunct Professor, Electrical and Computer Engineering

Bio

Dr. Pandey is an Adjunct Professor in the ECE Department at Carnegie Mellon University where his research interests range broadly across embedded systems, intelligent edge computing, system architecture for machine learning, and natural language processing. Dr. Pandey is also a Fellow and Vice President of R&D at Synopsys, where he leads the Machine Learning, Formal Verification and Power Analysis engineering teams.

Dr. Pandey has extensive experience in machine learning, distributed systems and infrastructure, and he previously led storage analytics systems at Nutanix, and the display ad targeting and security groups at Yahoo!. He earlier developed several formal verification technologies at Verplex and Cadence which are in widespread use in the industry. Dr. Pandey has been the recipient of the IEEE Transaction in CAD Outstanding author award, and holds over two dozen patents and refereed publications.

He completed his Ph.D. in Computer Science from Carnegie Mellon University and a B.S. in Computer Science from the Indian Institute of Technology Kharagpur.

Projects

1. DAC 2019 Tutorial: "Designing Application Specific AI Processors"
2. ChipEx 2019, Tel Aviv, Keynote: "AI: Driving the Next Generation of Chips and Systems"
3. DAC 2018 Malenda Keynote: "Transforming EDA with Machine Learning - Opportunities and Challenges"
4. DAC 2018 Tutorial: "Machine Learning for Electronic Design Automation"
5. DAC 2017 Tutorial: "Machine Learning and Systems for Building the Next Generation EDA Tools"
6. IWLS 2017 Keynote: "Machine Learning in Formal Verification"