|Department||Electrical and Computer Engineering|
|Office||8123 Wean Hall|
The goal of Professor Mowry's research is to dramatically boost the performance of future microprocessor-based systems. To accomplish this, Professor Mowry's research group exploits various forms of parallelism through a combination of novel architectural, compiler and operating systems support. In particular, they have been focusing on the opportunities and challenges created by two important very large scale integrated (VLSI) technology trends that are expected to reshape computer systems over the next decade: the potential for single-chip multiprocessing due to higher levels of single-chip integration, and the need to tolerate off-chip latency as the gap between processor speed and the speed of memory and I/O continues to widen.
The key challenge in exploiting single-chip multiprocessing is how to automatically convert all programs into parallel programs. To overcome this problem, the STAMPede project is exploring a novel technique called "thread-level data speculation, " which enables the compiler to optimistically parallelize applications despite uncertainty as to whether data dependencies exist between threads that would normally make this unsafe.
To tolerate off-chip latencies, Professor Mowry's group has been developing new compiler techniques for automatically inserting "prefetch" operations into applications to hide the latency of accessing data in main memory, disks or across networks. f-core numeric applications, and hiding network communication latency in workstation clusters.