Additions to the CASH Compiler
Tuesday October 19, 2004
Hamerschlag Hall D-210
Carnegie Mellon University
CASH is a CAD tool developed by the Phoenix group at Carnegie
Mellon University. CASH compiles high-level programs written
in C into asynchronous circuits. The particular microarchitecture
targeted by CASH is "Application-Specific Hardware",
which is an implementation of Spatial Computation. ASH requires
no clocks, nor any global signals. The computation structures
in ASH are never shared. The resulting circuits use only localized
communication, use no global control and are self-synchronized.
The performance of ASH circuits is comparable with that of
synchronous microprocessors, but with an energy-delay product
of up to three orders of magnitude better.
While the current results are extremely promising, we believe
that better circuits can be synthesized. In this talk, several
new approaches to improving the quality of circuits generated
by CASH are presented. First, the main performance bottleneck
in our circuits, the interface with the main memory, is addressed.
Second, the integration of two new pipelining styles is presented,
as well as their impact on performance, area, and power consumption.
Finally, the performance of some functional units is addressed
through some asynchronous-specific modifications. These ideas
are at various stages of integration into CASH, and several
preliminary results will be presented.
Tiberiu Chelcea received the B.S. and M.Sc. degrees in Electrical
Engineering from the Politehnica University of Bucharest,
Romania, in 1995 and 1996, respectively, and the Ph.D. Degree
in Computer Science from Columbia University, New York, in
He is currently a Postdoctoral Fellow within the Phoenix research
group at the Department of Computer Science, Carnegie Mellon
University. His research interests include asynchronous circuits,
design techniques for mixed-timing digital systems, and synthesis
methods from high-level languages down to asynchronous systems.