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The B3RISC: A Flexible FPGA-optimized Microprocessor for Multicore OS Research

Tuesday September 30, 2008
Hamerschlag Hall D-210
4:30 pm

Eric Chung
Carnegie Mellon University

The B3RISC is a flexible and domain-specific FPGA-based microprocessor that was recently developed at Microsoft Research for rapid multicore exploration of experimental parallel programming models and operating systems. In contrast to existing general-purpose soft cores, the B3RISC incorporates several unique design choices that are tailored to its given research applications. In particular, one of the primary objectives is to facilitate prototyping and co-development of both hardware and software within the Singularity project at Microsoft, which proposes a highly dependable operating system where the kernel, drivers, and applications are all written in managed code. Another objective of B3RISC is to support easily modifiable hardware source code and end-user instruction set customization.

In this talk, I will present the software applications and a detailed design overview of B3RISC. I will then discuss a completed implementation that was mapped and measured on the BEE3 FPGA platform. The final implementation is a RISC in-order processor pipeline and incorporates several key characteristics: 1) written exclusively in a flexible and type-safe, high-level operation-centric hardware description language, 2) omits conventional hardware protection mechanisms (e.g., MMU, TLBs) by leveraging the language safety properties of managed code, 3) supports late-binding of user-customizable ISA instructions via low-overhead micro-ops, and 4) efficiently utilizes FPGA resources to support a high core count per chip.

Eric just completed his fourth year as a PhD student at Carnegie Mellon University and is advised by Professor James C. Hoe. He is interested in FPGA-accelerated full-system multiprocessor simulation technologies and developing useful instrumentation components to accompany them. The B3RISC was developed at Microsoft Research with Chuck P. Thacker and John Davis in the summer of 2008.


Department of Electrical and Computer EngineeringCarnegie Mellon UniversitySchool of Computer Science