Link to CALCM Home  

Register Allocation for Irregular Architectures

Tuesday April 20, 2004
Hamerschlag Hall B-206
4:00 pm

Dave Koes
Carnegie Mellon University

Register allocation is one of the most important and necessary optimizations that compilers perform. In this talk I will discuss several limitations of traditional graph-coloring register allocation when applied to irregular architectures such as the x86 and 68k processors. These architectures are characterized by limited numbers of registers, register usage restrictions, memory operands, and variable length instructions. I will review previous work on the irregular architecture register allocation problem and present preliminary results from a multi-commodity network flow based solution.

Dave doesn't think computers are fast enough or that compilers are good enough. His goal in attending grad school is to remedy that situation. His advisor is Seth Goldstein. There is a high probability that he will bring homemade cookies to the talk.


Department of Electrical and Computer EngineeringCarnegie Mellon UniversitySchool of Computer Science