Table of Contents

XChange: Scalable Dynamic Multi-Resource Allocation in Multicore Architectures

Jose F. Martinez (Cornell)

Monday, Oct. 13th, 4:30PM-5:30PM
CIC Panther Hollow


Efficiently allocating shared on-chip resources across cores is critical to optimize execution in chip multiprocessors (CMPs). Techniques proposed in the literature often rely on global, centralized mechanisms that seek to maximize system throughput. This presents two potentially important limitations: First, global optimization may hurt fairness–by unfairly neglecting the resource needs of any one application. Second, global optimization may hurt scalability–as more cores are integrated on a die, the search space grows exponentially, making it harder to achieve optimal or even acceptable operating points at run-time without incurring significant overheads. We propose XChange, a novel CMP resource allocation mechanism that delivers scalable high throughput and fairness. Through XChange, the CMP functions as a market, where each shared resource is assigned a price which changes over time, and each core seeks to maximize its own utility, by bidding for these shared resources. By distributing the resources proportionally to the bids, the system avoids unfairness, treating each core in an unbiased manner. In addition, because each core works largely independently, the resource allocation becomes a scalable, mostly distributed decision-making process. Our evaluation shows that in a 64-core CMP system, XChange improves system throughput (weighted speedup) by 22%, and fairness (harmonic speedup) by 24%, compared with equal-share resource distribution. On both metrics, that is about twice as much improvement over equal-share as a stateof- the-art centralized allocation scheme. Furthermore, our results show that XChange is significantly more scalable than the state-of-the-art centralized allocation scheme we compare against.


José Martínez is associate professor of electrical and computer engineering and graduate field member of computer science at Cornell. His research work has earned several awards; among them: two IEEE Micro Top Picks papers; a HPCA Best Paper Award; a NSF CAREER Award; two IBM Faculty Awards; and the inaugural Computer Science Distinguished Educator Alumnus Award by the University of Illinois. On the teaching side, he has been recognized with two College of Engineering Kenneth A. Goldman '71 Excellence in Teaching awards (2005 and 2014), as a Merrill Presidential Teacher (2007), and as the 2011 Tau Beta Pi Professor of the Year in the College of Engineering.

Prof. Martínez graduated in computer science and engineering in 1996 from the Universidad Politécnica de Valencia, and earned MS (1999) and Ph.D. (2002) degrees in computer science from the University of Illinois at Urbana-Champaign. A two-time recepient of the Spanish government's National Award for Academic Excellence, he held a four-year graduate fellowship from the Bank of Spain. While a graduate student at the UIUC, he was inducted into the Honor Society of Phi Kappa Phi.

Prof. Martínez is a member of the Computer Systems Laboratory and the Intelligent Information Systems Institute at Cornell. He is the Editor in Chief of IEEE Computer Architecture Letters, Associate Editor of ACM Trans. on Computer Architecture and Code Optimization, and senior member of the ACM and the IEEE. He also serves on the Advisory board of the Industry-Academia Partnership for architecture, networking, and storage needs of future data centers and cloud computing.