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Jian Wang Parameterized Macromodeling for Analog System-Level Design Exploration Advisor: Larry Pileggi As the complexity of on-chip analog systems continues to increase, the system level architecture selection and implementation process becomes increasingly critical. Selecting an inferior system architecture might not only limit the performance, but also overly complicate the subsequent design process. The system level optimization problem is extremely challenging in practice, however, and remains mainly based on designer’s experience and intuition for analog systems. The primary difficulty lies in evaluating the system performance, which is represented only by a large number of design variables and their complex interactions. Simulating the entire analog system at the transistor level is one way to model performance, but it provides models only for fixed, “hard” IP. For this reason, most system level design methodologies employ hand-analysis equations or simple regression models, both of which can result in significant errors. In this project we propose a novel technique to systematically build parameterized macromodels for analog blocks that can be used for system level exploration in a top-down design manner. Unlike traditional models that are extracted only for a fixed design and are used for bottom-up verification, our parameterized macromodel is characterized as a function of design variables that can facilitate systemlevel trade-off analysis and optimization. In addition to parameterized macromodeling of analog circuits, the proposed methodology can also be applied to many other applications, such as multi-parameter RSM fitting, statistical circuit analysis, etc. Selected Highlights One novel application of our parameterized macromodeling is to include a piece-wise linear (or polynomial) approximation to guarantee high modeling accuracy over the large analog design space. We recursively partition the large design space into smaller ones and extract the parameterized macromodel in each small space. Most importantly, the high-dimensional design space partition problem is formulated as a convex optimization which can be reliably solved to find the optimal partitioning. Our parameterized macromodeling is based on Krylov subspace projection and multi-parameter moment matching. Given a high-order, parameterized system, we attempt to find a reduced-order (low-order) system such that the input-output relation is nearly identical. In this project, the parameterized, reduced-order system is extracted by a novel two-step explicit-and-implicit moment matching algorithm. Compared with other traditional techniques, the proposed algorithm can match significantly more moments with a small model size. It follows that the resulting macromodel can provide more accurate system-level simulation results at a substantially lower simulation cost.
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Jian
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