*** This old style webpage is no longer maintained (as of 9/2008). Please go to my new wiki pages for up-to-date information.)

Research Interests

I am interested in many aspects of computer architecture and digital hardware design. My current research focuses on computer architecture, processor microarchitecture, simulation and FPGA emulation of computer systems, and tools for high-level hardware design and synthesis. My current and past program committee service include CAD and architecture conferences such as DAC, FPGA, HPCA, ICCAD, ICCD, ICS, ISCA, MEMOCODE, and SC. My current and past research sponsors include (alphabetically) C2S2, DARPA, IBM, Intel, ITRI@CMU, NSF (including a CAREER Award), SRC, and SUN (OpenSPARC Center of Excellence). How to contact me. (** I apologize I cannot reply to email queries about graduate school admission given the traffic volume. I do look at them, especially those with something specific to comment. If you are interested in my projects, please submit an application to ECE and reference me in your statement of purpose. If you want to know the truth about graduate school, read this.)

Reliable Processors and Systems:

 This research investigates the impact of soft-error tolerance in future deep-submicron microprocessor designs. The study investigates different options to achieve the desired level of protection against soft errors. This research effort is in part supported by NSF through a CAREER Award. The TRUSS project (Total Reliability Using Scalable Servers) develops a reliable, available, and serviceable (RAS) hardware platform based on a distributed cluster of commodity blade servers. The goal of the project is to leverage the cost-effectiveness of commodity processor and memory modules in a reliable server design that achieves both performance and cost scalability. This research effort is in part supported by NSF through an ITR Award and by Intel Corp. (TRUSS Project Page)

Mathematical Approach to High-Level Synthesis and Optimization of DSP Hardware:

 This research develops a domain-specific hardware synthesis framework for digital signal processing (DSP) computations. By incorporating domain-specific knowledge of mathematics and algebra into a synthesis tool, the proposed framework can manipulate a math-level transform description to optimize a DSP transform implementation at the algorithmic and architectural design level. This research is a part of the SPIRAL project. This research is in part supported by NSF through an ITR Award and by DARPA through the DESA program.

FPGA Prototyping and Emulation of Computer Systems

 This research explores the application of Field Programmable Gate Arrays (FPGA) and High-level Hardware Synthesis technologies in computer systems prototyping and emulation. The goal of ProtoFlex FPGA-accelerated hybrid simulation is to extend the capability of SimFlex multiprocessor simulation to hundreds to thousands of nodes. My students and I are members of the multi-university RAMP project.

SMARTS Simulation Sampling:

 SMARTS is a framework that applies statistical sampling to accelerate microarchitecture simulation. It employs systematic sampling to measure only a very small portion of the entire application being simulated. The accelerated simulation rate allows complete benchmarks to be used in performance studies. SMARTS is a part of SimFlex.

Operation-Centric Hardware Description and Synthesis:

 This research investigates a high-level hardware design framework that supports a new hardware design abstraction that is fundamentally different from RTL. This framework is based on an operation-centric abstraction for hardware description. In an operation-centric description, the behavior of a system is decomposed and described as a collection of atomic operations. Check out Bluespec.com if you want to try out a commercial implementation.

User-Level Network Interface for Cluster Computing:

Once upon a time, I developed the StarT-X and StarT-Jr parallel systems. In 1998, a StarT-X cluster with 32 400MHz Pentium-II Xeon processors (Hyades) was delivered to MIT's Earth Atmosphere and Planetary Science Department. For several years, the cluster was their primary facility for running MITgcmUV (a general circulation model for climate simulation) in research and courses.



How to contact me.