Goals

The Impetus research group at Carnegie Mellon focuses on the design, evaluation, and implementation computer systems with emphasis on processor and memory architecture. Current projects include:

• STeMS: Spatio-Temporal Streaming
  

  Technological advancements in semiconductor fabrication have led to an abundance of on-chip transistors, faster clock speeds, and unprecedented processor performance. In contrast, while DRAM capacity has increased commensurately, DRAM speeds have primarily lagged behind resulting in an ever-increasing processor/memory performance gap. Spatio-Temporal Memory Streaming (STeMS) is a new memory system architecture in which memory moves in correlated groups (called spatio-temporal streams) rather than individual cache blocks to enhance fetch lookahead and memory-level parallelism, hide memory latency, and improve on-chip storage utilization and pin bandwidth.

• TRUSS: Scalable Non-Stop Servers
  

  Server availability and reliability is now ever more a critical aspect of computing, because information processing and storage are becoming a key pillar of a modern society’s infrastruscture. Unfortunately, while availability and reliability are becoming increasing crucial, it is also ever more challenging to design, manufacture, and market reliable server platforms. This project proposes the Total Reliability Using Scalable Server (TRUSS) architecture, a reliable, available, and servicable (RAS) hardware platform. TRUSS offers both cost and performance scalability unparalled by conventional RAS-oriented servers by using commodity blade components interconnected through a scalable network and hardware distributed shared memory (DSM).

• SimFlex: Fast, Accurate & Flexible Simulation
  

  Computer architects have long relied on software simulation to measure dynamic performance metrics (e.g. CPI) of a proposed design. Unfortunately, with the ever-growing size and complexity of modern microprocessors, detailed software simulators have become four or more orders of magnitude slower than their hardware counterparts. The low simulation throughput is especially prohibitive for large-scale multiprocessor systems because the simulation turnaround for these systems grows at least linearly with the number of processors. This project proposes the SimFlex framework to support fast, accurate and flexible simulation of large-scale systems. SimFlex applies rigorous statistical sampling theory to reduce simulation turnaround by several orders of magnitude, while achieving high accuracy and confidence in estimates. SimFlex relies heavily on well-defined component interface models to facilitate both model integration and compile-time simultaor optimization.